[1]
Terapasirdsin, A., Rotach, W.F., Wattanapongsakorn, N. and Madden, P.H. 2008. A Modified Edge Removal Stiener Tree Heuristic for Global Routing in VLSI Design. ECTI Transactions on Electrical Engineering, Electronics, and Communications. 8, 2 (Dec. 2008), 179–186. DOI:https://doi.org/10.37936/ecti-eec.201082.172094.