1.
Terapasirdsin A, Rotach WF, Wattanapongsakorn N, Madden PH. A Modified Edge Removal Stiener Tree Heuristic for Global Routing in VLSI Design. ECTI-EEC [internet]. 2008 Dec. 27 [cited 2026 Sep. 18];8(2):179-86. available from: https://ph02.tci-thaijo.org/index.php/ECTI-EEC/article/view/172094