A Symmetrical Cross-Connected T-Type Multilevel Inverter With Reduce Device Count

Main Article Content

Vishal Rathore
Dhananjay Kumar
Prateek Mundra

Abstract

This paper presents a symmetrical, cross-connected T-type (CT-type) multilevel inverter (MLI) configuration with reduced device count (RDC). It comprises eight power switches, two DC sources, and four capacitors with self-voltage balancing. The generalized topology is formed by two CT-type basic modules connected by two power switches. These topologies operate using DC sources and capacitors having the same or different voltage levels, which can be extended by cascading the modules to attain a higher voltage level suitable for high-power applications. Therefore, the proposed CT-Type MLI is a good choice for renewable energy applications that require a lower input voltage source magnitude to attain high voltage levels. This paper uses the Matlab/Simulink platform to simulate the proposed CT-type topology using the level-shifted pulse width modulation (LS-PWM) technique. Further, a laboratory prototype is developed to test and validate the feasibility and effectiveness of the proposed MLI. Finally, a comparative analysis of the number of DC sources, capacitors, power switches, drivers, and total standing voltage (TSV) is presented against similar recent topologies.

Article Details

How to Cite
Rathore, V., Kumar, D., & Mundra, P. (2023). A Symmetrical Cross-Connected T-Type Multilevel Inverter With Reduce Device Count. ECTI Transactions on Electrical Engineering, Electronics, and Communications, 21(2), 249828 . https://doi.org/10.37936/ecti-eec.2023212.249828
Section
Publish Article
Author Biographies

Vishal Rathore, an Assistant Professor at BITS Bhopal, MP, India.

Vishal Rathore received his B.E. degree in Electrical and Electronics Engineering from Laxmi Narayan College of Technology (LNCT), Bhopal, India, in 2007, M.Tech. in Electrical Drives form MANIT Bhopal in 2012 and Ph.D. from NIT Jamshedpur, Jharkhand, India. Currently, he is working as an Assistant Professor at BITS Bhopal, MP, India. His fields of interest include Multilevel inverters based multiphase drives, Application of multiphase machine in electric vehicles, Real-time controllers for power electronics based drives systems, and usage of power electronics in transit systems.

Dhananjay Kumar, a Senior Technologist in Department of Industrial Research Design and Development (IRDD), Aartech Solonics Ltd., Mandideep, India.

Dhananjay Kumar received his BE degree from Lakshmi Narain College of Technology, Bhopal, Madhya Pradesh, India in 2014, the M.Tech (Electrical Drives) degree from Maulana Azad National Institute of Technology, Bhopal, India in 2017, and the Ph.D degree from Department of Electrical Engineering, Maulana Azad National Institute of Technology, Bhopal, India in 2022. Currently, he is working as a Senior Technologist in Department of Industrial Research Design and Development (IRDD), Aartech Solonics Ltd., Mandideep, India. His fields of interest are multilevel inverters, power electronics for renewable energy, and energy storage system.

Prateek Mundra, pursuing Ph.D. from Maulana Azad National Institute of Technology, Bhopal, India.

Prateek Mundra received his B.E. degree in Electrical and Electronics Engineering from Lakshmi Narain College of Technology (LNCT), Bhopal, India, in 2014. He received M.Tech. (Power System) from MANIT, Bhopal, India. Currently, he is pursuing Ph.D. from Maulana Azad National Institute of Technology, Bhopal, India. His fields of interest include Renewable energy economics, renewable energy forecasting, power system stability etc.

References

Rathore V., Yadav, K.B., Dhamudia S. (2021). An Implementation of Nine-Level Hybrid Cascade Multilevel Inverter (HCMLI) Using IPD-Topology for Harmonic Reduction. Nanoelectronics, Circuits and Communication Systems, 2021, vol 692. Springer, Singapore.

Gupta KK, Jain S. Comprehensive review of a recently proposed multilevel inverter. IET Power Electronics. 2014 Mar;7(3):467-79.

Kumar D, Nema RK, Gupta S. A comparative review on power conversion topologies and energy storage system for electric vehicles. International Journal of Energy Research. 2020 Aug;44(10):7863-85.

Rathore, V., & Yadav, K. B. (2021). Comparative efficiency analysis of five-level dual three-phase multilevel inverter fed six-phase induction motor drive. International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, e2981.

Rathore V., & Yadav, K. B. Mathematical Modeling and Numerical Analysis of SPIM Drive Using Modified SVPWM Technique. ECTI Transactions on Electrical Engineering, Electronics, and Communications, 2022, 20(2), 152–162.

Kumar D, Nema RK, Gupta S. Development of a novel fault-tolerant reduced device count T-type multilevel inverter topology. International Journal of Electrical Power & Energy Systems. 2021 Nov 1;132:107185.

Kumar D, Nema RK, Gupta S. Development of faulttolerant reduced device version with switchedcapacitor based multilevel inverter topologies. In- A SYMMETRICAL CROSS CONNECTED T-TYPE MULTILEVEL INVERTER WITH REDUCE DEVICE COUNT 11 ternational Transactions on Electrical Energy Systems. 2021 May 24:e12893.

Gupta KK, Ranjan A, Bhatnagar P, Sahu LK, Jain S. Multilevel inverter topologies with reduced device count: A review. IEEE Transactions on Power Electronics. 2015 Feb 26;31(1):135-51.

Anand V, Singh V. Compact symmetrical and asymmetrical multilevel inverter with reduced switches. International Transactions on Electrical Energy Systems. 2020 Aug;30(8):e12458.

Mahato B, Majumdar S, Jana KC. Single-phase Modified T-type–based multilevel inverter with reduced number of power electronic devices. International Transactions on Electrical Energy Systems. 2019 Nov;29(11):e12097.

Siddique MD, Mekhilef S, Shah NM, Sandeep N, Ali JS, Iqbal A, Ahmed M, Ghoneim SS, Al-Harthi MM, Alamri B, Salem FA. A single DC source ninelevel switched-capacitor boost inverter topology with reduced switch count. IEEE Access. 2019 Dec 27;8:5840-51.

Gupta KK, Jain S. A novel multilevel inverter based on switched DC sources. IEEE Transactions on Industrial Electronics. 2013 Sep 18;61(7):3269-78.

Alishah RS, Hosseini SH, Babaei E, Sabahi M. Optimal design of new cascaded switch-ladder multilevel inverter structure. IEEE Transactions on Industrial Electronics. 2016 Nov 9;64(3):2072-80.

Alishah RS, Nazarpour D, Hosseini SH, Sabahi M. Reduction of power electronic elements in multilevel converters using a new cascade structure. IEEE Transactions on Industrial Electronics. 2014 Jun 26;62(1):256-69.

Babaei E, Laali S, Bayat Z. A single-phase cascaded multilevel inverter based on a new basic unit with reduced number of power switches. IEEE Transactions on industrial electronics. 2014 Jul 8;62(2):922- 9.

Gautam SP, Sahu LK, Gupta S. Reduction in number of devices for symmetrical and asymmetrical multilevel inverters. IET Power Electronics. 2016 Mar;9(4):698-709.

Siddique MD, Iqbal A, Memon MA, Mekhilef S. A new configurable topology for multilevel inverter with reduced switching components. IEEE Access. 2020 Oct 14;8:188726-41.

Saeedian M, Adabi J, Hosseini SM. Cascaded multilevel inverter based on symmetric asymmetric DC sources with reduced number of components. IET Power Electronics. 2017 Oct 16;10(12):1468-78.

Salem A, Van Khang H, Robbersmyr KG, Norambuena M, Rodriguez J. Voltage source multilevel inverters with reduced device count: Topological review and novel comparative factors. IEEE Transactions on Power Electronics. 2020 Jul 27;36(3):2720- 47.

Vemuganti HP, Sreenivasarao D, Ganjikunta SK, Suryawanshi HM, Abu-Rub H. A survey on reduced switch count multilev ternational Transactions on Electrical Energy Systems. 2021 May 24:e12893.

Gupta KK, Ranjan A, Bhatnagar P, Sahu LK, Jain S. Multilevel inverter topologies with reduced device count: A review. IEEE Transactions on Power Electronics. 2015 Feb 26;31(1):135-51.

Anand V, Singh V. Compact symmetrical and asymmetrical multilevel inverter with reduced switches. International Transactions on Electrical Energy Systems. 2020 Aug;30(8):e12458.

Mahato B, Majumdar S, Jana KC. Single-phase Modified T-type–based multilevel inverter with reduced number of power electronic devices. International Transactions on Electrical Energy Systems. 2019 Nov;29(11):e12097.

Siddique MD, Mekhilef S, Shah NM, Sandeep N, Ali JS, Iqbal A, Ahmed M, Ghoneim SS, Al-Harthi MM, Alamri B, Salem FA. A single DC source ninelevel switched-capacitor boost inverter topology with reduced switch count. IEEE Access. 2019 Dec 27;8:5840-51.

Gupta KK, Jain S. A novel multilevel inverter based on switched DC sources. IEEE Transactions on Industrial Electronics. 2013 Sep 18;61(7):3269-78.

Alishah RS, Hosseini SH, Babaei E, Sabahi M. Optimal design of new cascaded switch-ladder multilevel inverter structure. IEEE Transactions on Industrial Electronics. 2016 Nov 9;64(3):2072-80.

Alishah RS, Nazarpour D, Hosseini SH, Sabahi M. Reduction of power electronic elements in multilevel converters using a new cascade structure. IEEE Transactions on Industrial Electronics. 2014 Jun 26;62(1):256-69.

Babaei E, Laali S, Bayat Z. A single-phase cascaded multilevel inverter based on a new basic unit with reduced number of power switches. IEEE Transactions on industrial electronics. 2014 Jul 8;62(2):922- 9.

Gautam SP, Sahu LK, Gupta S. Reduction in number of devices for symmetrical and asymmetrical multilevel inverters. IET Power Electronics. 2016 Mar;9(4):698-709.

Siddique MD, Iqbal A, Memon MA, Mekhilef S. A new configurable topology for multilevel inverter with reduced switching components. IEEE Access. 2020 Oct 14;8:188726-41.

Saeedian M, Adabi J, Hosseini SM. Cascaded multilevel inverter based on symmetric asymmetric DC sources with reduced number of components. IET Power Electronics. 2017 Oct 16;10(12):1468-78.

Salem A, Van Khang H, Robbersmyr KG, Norambuena M, Rodriguez J. Voltage source multilevel inverters with reduced device count: Topological review and novel comparative factors. IEEE Transactions on Power Electronics. 2020 Jul 27;36(3):2720- 47.

Vemuganti HP, Sreenivasarao D, Ganjikunta SK, Suryawanshi HM, Abu-Rub H. A survey on reduced switch count multilevel inverters. IEEE Open Journal of the Industrial Electronics Society. 2021 Jan 8;2:80-111.

Rathore V, Kumar D, Yadav KB. A 5-level T-type inverter fed six-phase induction motor drive for industrial applications. International journal of Electronics. 2023 Jan 7:1 21. doi:10.1080/00207217.2022.2164068

Routray A, Singh RK, Mahanty R. Selective harmonic elimination in hybrid cascaded multilevel inverter using modified whale optimization. International Transactions on Electrical Energy Systems. 2020 Apr;30(4):e12298.

Babaei E, Farhadi Kangarlu M, Sabahi M. Extended multilevel converters: an attempt to reduce the number of independent DC voltage sources in cascaded multilevel converters. IET Power Electronics. 2014 Jan;7(1):157-66.

Pulikanti SR, Agelidis VG. Hybrid flying-capacitorbased active-neutral-point-clamped five-level converter operated with SHE-PWM. IEEE Transactions on Industrial Electronics. 2011 Jan 13;58(10):4643- 53.

Rathore V, Yadav KB. Experimental analysis of multilevel inverter fed six-phase induction motor for high power applications. Revue Roumaine Des Sciences Techniques—Série Electrotechnique et Energétique. 2022 dec 22;67(4):389-94.

Meraj ST, Hasan K, Masaoud A. Simplified one dimensional space vector modulation of crossswitched multilevel inverter. In2017 IEEE 15th Student Conference on Research and Development (SCOReD) 2017 Dec 13 (pp. 350-355).

Rathore V, Yadav KB. Five-level Cascaded H-bridge MLI using New In-phase Disposition PWM Technique for Harmonics Mitigation. International Journal of Power and Energy Systems. 2023;43(10):1-8. DOI: 10.2316/J.2023.203-0345

Hosseinzadeh MA, Sarebanzadeh M, Rivera M, Babaei E, Wheeler P. A reduced single-phase switched-diode cascaded multilevel inverter. IEEE Journal of Emerging and Selected Topics in Power Electronics. 2020 Jul 21;9(3):3556-69.

Zeng R, Xu L, Yao L, Finney SJ. Analysis and control of modular multilevel converters under asymmetric arm impedance conditions. IEEE Transactions on Industrial Electronics. 2015 Sep 7;63(1):71-81.

Sandeep N, Ali JS, Yaragatti UR, Vijayakumar K. A self-balancing five-level boosting inverter with reduced components. IEEE Transactions on Power Electronics. 2018 Dec 25;34(7):6020-4.

Edwin JS, Titus S. A stipulation based sources insertion multilevel inverter (SBSIMLI) for waning the component count and separate dc sources. Journal of Electrical Engineering and Technology. 2017;12(4):1519-28.

Nair V, Kaarthik RS, Kshirsagar A, Gopakumar K. Generation of higher number of voltage levels by stacking inverters of lower multilevel structures with low voltage devices for drives. IEEE Transactions on Power Electronics. 2016 Feb 11;32(1):52-9.

Babaei E, Gowgani SS. Hybrid multilevel inverter using switched capacitor units. IEEE Transactions on industrial electronics. 2013 Nov 20;61(9):4614-21.