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A generalized analysis of the common-mode rejection performance due to both (trans-) conductance and capacitance mismatches in MOS transistor pairs is developed for the current-feedback instrumentation amplifiers (CFIAs). The generalized equations can be applied to the CFIAs with the current feedback path either via the drain terminals and the source terminals of the input stage. Such a generalization enables us to explore the optimum CFIA structure with a high CMRR for a specific application. Extensive verification of the developed equations is provided via practical simulation using BSIM MOS models, with excellent agreement between simulated and analytical results.
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Faculty of Engineering and Technology
Mahanakorn University of Technology
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