The Study of High-Level System Design for Heterogeneous Architecture
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Abstract
This paper presents the study of high-level system design for heterogeneous architecture which is increasingly popular because it can accelerate computational intensive applications implemented on different types of processors. The system may consist of CPUs, GPUs, FPGAs or DSPs connected by buses and sharing memories. High level design languages are required for developing in such complex system since designers can take advantages of a short design time also quick design assessments. The most promising OpenCL design language which is highlighted in this paper can benefit more varieties of implementing in Heterogeneous System Architectures (HSA). The Parallella development board is introduced. It will be used as a heterogeneous platform for accelerating computations in data dominated applications.
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This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
Copyright @2021 Engineering Transactions
Faculty of Engineering and Technology
Mahanakorn University of Technology
References
Teich, J., "Hardware/Software Codesign: The Past, the Present, and Predicting the Future," Proceedings of the IEEE , vol.100, no.Special Centennial Issue, pp.1411,1430, May 13 2012.
Shagrithaya, K.; Kepa, K.; Athanas, P., "Enabling development of OpenCL applications on FPGA platforms," Application-Specific Systems, Architectures and Processors (ASAP), 2013 IEEE 24th International Conference on , vol., no., pp.26,30, 5-7 June 2013.
Ozgul, B.; Langer, J.; Noguera, J.; Visses, K., "Software-programmable digital pre-distortion on the Zynq SoC," Very Large Scale Integration (VLSI-SoC), 2013 IFIP/IEEE 21st International Conference on , vol., no., pp.288,289, 7-9 Oct. 2013.
Wikipedia., “OpenCL,” http://th.wikipedia.org/wiki/OpenCL, May 7, 2014.
Aaftab Munshi., “The OpenCL Specification,” https://www.khronos.org/registry/cl/specs/opencl-1.2.pdf, Nov 14, 2012.
Taneem Ahmed., “OpenCL framework for a CPU, GPU, and FPGA Platform,” https://tspace.library.utoronto.ca/bitstream/1807/30149/3/Ahmed_Taneem_201111_MSc_thesis.pdf, 2011.
Rick Weber, Akila Gothandaraman, Robert J. Hinde, and Gregory D. Peterson “Comparing Hardware Accelerators in Scientific Applications: A Case Study” IEEE Transactions On Parallel And Distributed Systems, Vol. 22, No. 1, January 2011.
AMD., “HSA: A New Architecture for Heterogeneous Computing,” Tirias Research, January 28, 2013.
James Coole, Greg Stitt, “Fast, Flexible High-Level Synthesis From Opencl Using Reconfiguration Contexts” IEEE Micro (Volume:34 , Issue: 1 ), IEEE Computer Society, Page(s): 42 – 53, Jan.-Feb. 2014.
Adapteva., “Parallella-1.x Reference Manual,” http://www.parallella.org/docs/parallella_manual.pdf, Sep 9 2014.
Xilinx Inc., “UG871-Vivado Design Suite Tutorial: High-Level Synthesis,” http://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_3/ug871-vivado-high-level-synthesis-tutorial.pdf, May 6, 2014.
Xilinx Inc., “Zynq-7000 Silicon Devices,” http://www.xilinx.com/products/silicon-devices/soc/zynq-7000/silicon-devices.html, Nov 13, 2014.
Adapteva., “Epiphany sdk reference (REV 5.13.09.10),” http://adapteva.com/docs/epiphany_sdk_ref.pdf, Aug. 2014.
Yaniv Sapir., “Building the World’s First Parallella Beowulf Cluster,” http://www.adapteva.com/white-papers/building-the-worlds-first-parallella-beowulf-cluster, January 18 2013.
Andreas Olofsson., “OpenCL: Leveling the playing field for processors,” http://www.adapteva.com/white-papers/opencl-leveling-the-playing-field-for-processors, December 19, 2012.
Censix., “Mini Parallella Cluster managed with SLURM,” http://forums.parallella.org/viewtopic.php?f=32&t=1632, Aug. 13, 2014.
Parallella Community ., “Project,” http://forums.parallella.org/viewforum.php?f=6 Nov. 13, 2014.