Soft Error-Aware Leakage Reduction through Body Bias

Main Article Content

วรินทร์ สุดคนึง
ศุภชัย หอวิมานพร
ศศิธร ชูแก้ว

Abstract

Abstract

           For modern processors, two reliability issues, namely increased leakage power and soft error rate, continue to intensify as device technologies scale down to nanometers. While many researchers have proposed methods to efficiently control leakage power by tuning body bias, few recent works have considered the quantitative negative impact of this technique on circuit soft error vulnerability. In this paper, we introduce a novel body bias based approach for reliability improvement that correlates leakage reduction and soft error immunity degradation. The experimental results show that the proposed technique provides satisfactory leakage reduction with confined soft error degradation in 32 nm high-k/metal gate benchmark circuits.

Article Details

How to Cite
[1]
สุดคนึง ว., หอวิมานพร ศ., and ชูแก้ว ศ., “Soft Error-Aware Leakage Reduction through Body Bias”, RMUTP Sci J, vol. 11, no. 1, pp. 65–77, May 2017.
Section
บทความวิจัย (Research Articles)